Computer Science 237 Vocabulary

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Terms

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Stack: Something that holds a list of function calls (call frames?)
word: You have to move 2 places in assembly
2 bytes, 4 zeros in Hex
long: You have to move 4 places in assembly
short: one place?
address register: a0---a something, holds addresses, can be used to hold data or address, can use address indirect mode
data register: used to hold data
address direct: treat %a something as a value, like a data register

Maybe revised
effective address: The actual location a data is stored in main storage Several techniques are used to get the effective address: displacement, indexing
displacement: Use the address indirect mode, then add a constant
Ex:
b = 10
b(%a0)
indexing: Move by byte. Faciliate the retrival of information
Address indirect with displacement and indexing: address register indirect with displacement and indexing usage:
d(An,Dm.w)
An is base address of the array.
Dm is (word) wide register that provides the byte offset of element from base address.
d is selected to make index of first element 0 bytes away from base address

In c programming, d is always 0
Nor: not a and not b
K map: list possibilites, list the ones, make map
For more than 16 entries, make two maps
Register: A special circuit in a CPU, such as an accumulator or program counter that can either hold a value or perform some arithmetical or logical operation.

Or just a location in RAM
CMP: assembly command for 68k
Cmp #5, %d5
beq...
Test conditions in 68k: bgt, beq, blt
something like that
little endian: if the least significant byte is on the left
big endian: if the most significant byte is on the left
int *a, int *b: In C, meaning the pointer to a and b
swap (&a,&b): &a and &b are memory addresses of a and b. Are they then pointers?
logical shift left / right: lsl in assembly, lsr
don't know about C
Careful, doesn't take care of negative numbers. May make them bigger?
arithemetic shift left/ right: asl, asr in assembly
in C, << >>
XOR, OR bitwise AND: ^ is XOR, and | OR in C (bitwise)
& in C is bitwise AND
1's complement: flip negative
different representations of 0
from -2^n +1 to 2^n - 1 for size n
2's complement: flip negative add 1
one 0
from -2^n to 2^n -1
signed magnitude: greatest bit is sign
range is same as 1's complement, which is

-2^n + 1 to 2^n-1
convert a number to floating point binary: Take digit if 1, times 2, take digit if 1, times 2, all until you see repeat

can't represent 0.1 with finite digits because it repeats in binary
Von Neumann architecture What is this guy not a part of?: Stored program computers

fetch instruction
write where to go next
execute instruction
move to the next place

Use CPU, memory, and others things to store and perform instructions. Programmable!
phantom one bit: Yeah, what is it?
program counter: says where the program will go next

called PC in the debugger
condition code / status register lower right hand corner of debugger CCR: Z=Zero, C=Carry, V=oVerflow, X=eXtend, and N=Negative
Address register indirect with predecrement:: -(%a7), that is, -(%sp)
logarithmic gate delay for fan in: In a fan-in-allowed situation, there will be log n gate delay
MUX, DEMUX: MUX takes several inputs and produce one output
DEMUX takes one input and addresses and produce several outputs

MUX is lab 6 4.b
DEMUX is the digital lab circuit on the top right
Half adder: XOR and AND
XOR for S, AND for C
no carry in
Full adder: String twD o half adders and you get it
Ripple adder: String several full adders and you get it
latch: something that remembers its value
Don't know what the output looks like yet
flipflop: latch with a clock (really?)
T flip flip: XOR inside
we use it to make a counter
call frame: My guess is the thing about

oldfp
rts
variables
allocating space for local variables in assembly: link %a6, #-10
bistable: there are two possible signals.
One will be on indefinitely until an external input changes it
flipflops are bistable
JK flipflop: don't have 1,1 problems
when both 1, the output toggles

something more?
T flipflop: simple version of JK flipflop
D flipflop: one input
Buffer: ----->o---->o----- dual inverter type
----->---- true type
When is fan-in allowed?: When only one of the interconnected lines is 1 every time
Tri-state buffer: | (control)
(input) ---->---- (output)
when control is high, acts like buffer; when low, acts like broken wire
Difference between no output and 0: They are different in the case of tri-state buffer
no signal is when the control is off
0 is when the control is on and output is 0
MUX revisited What does a MUX look like?: input, address, and gate, or gate
what does a DEMUX look like?: input, address, and gates, many outputs
4 X 1 memory _____ | | | | | | -----: 4 is the number of units in the memory
1 is the addressability, the smallest number of bits we can address
The cables connecting a memory: D <------> | |
A <------> x 2 | 4 |
read !write ---> | x |
chip select (cs) --->|_1__|
D cable: The data bus? To transfer values to storage, get a value from it
number of wires is the same as addressability number
A cables: There are log2(n)of them.
selects among n units of memory. Seems like a MUX

select which unit in read/write? what?
read !write cable: looks like a boolean, 1 meaning read, 0 meaning write
chip select: selects the chip
in other words, activates the chip
Draw a 4 x 1 memory: See Teresco's website for answer
Draw a 4 x 4 memory: See Teresco's website for answer
In memory speicification: 4 x 4 What's A and D?: A is the log of left number
D is the right number
Draw a 4 x 8 memory: See Teresco's website for answer
Draw a 1000 x 8 memory: See Teresco's website for answer
The two options of 1000 x 8: Option1 Bank 1: 0 - 3
Bank 2: 4 - 7
.
Option2 Bank 1: 0,256,512
Bank 2: 1,257,513

1. continguous memory on a bank
2. advantages for chip layout
Draw a 128 x 64 memory: do it
How many cables do you need for a memory: Data lines + Address lines + CS + Re!write
CPU request address lines if CPU can address bytes?: Address lines + lines needed to pick one byte

16384 x 1024

14 address lines + 10 to pick out a byte = 24 address lines
Why option 2?: Because we want to get the values all at once

Also because we have to implement too many wires in option 1
Parity bit: Make parity bit, use that bit to check if the data still has an odd number of 1's when it is retrieved

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